1. Field of the Invention
The present invention relates to a system on a programmable chip. More specifically, the present invention relates to methods and apparatus for implementing master components and slave components on a programmable chip.
2. Description of Related Art
A number of benefits have spurred efforts towards developing programmable chips that can include a variety of components. In some examples, programmable chips can be implemented with both logic elements, a processor core, as well as peripheral components and interfaces. Integrating master components such as processor cores and slave components such as peripherals along with logic elements on a single programmable chip allows efficient and effective processing.
Some mechanisms for implementing a programmable chip entail using a general purpose programming language or a high level language. In one example, code written in a general purpose programming language such as C or C++ is converted into a hardware descriptor language (HDL) file using a tool such as the DK1 Design Suite available from Celoxica Corporation of Abingdon, United Kingdom. The HDL file can then be synthesized and implemented on a programmable chip such as a programmable logic device (PLD) or a field programmable gate array (FPGA). Some available synthesis tools are Leonardo Spectrum, available from Mentor Graphics Corporation of Wilsonville, Oreg. and Synplify available from Synplicity Corporation of Sunnyvale, Calif.
However, mechanisms for efficiently implementing both master components and slave components on a programmable chip are limited. In particular, mechanisms for generating a memory map on a programmable chip having master components and slave components are inefficient. It is therefore desirable to provide improved methods and apparatus for implementing a programmable chip with master components as well as slave components.